Integrated Optics: Breaking the Bandwidth Bottleneck for Hyperscale AI | Features | Mar 2026 - Photonics Spectra

Skyler: Hey, welcome back to Line Rate — the show that tracks the chips, standards, and infrastructure moving data at the speed of A I. I'm Skyler Monroe, and if you care about what's happening inside the datacenter fabric — the interconnects, the packaging, the protocols — you're in the right place. Big thanks to our sponsors Ada, who helps organizations actually integrate A I into their real workflows, and Zen Semiconductor, whose portfolio includes the Loom A I fabric, their DC-to-DC scale-across interconnect, and Ada for deploying A I at scale. Today we're going deep on co-packaged optics — it's everywhere this week — plus Samsung's CPO ambitions, Nokia's new A I networking lab, and Marvell's Photonic Fabric push. Let's get into it. Skyler: Alright, first up — Photonics Spectra ran a feature this month on integrated optics and the bandwidth bottleneck for hyperscale A I, and it's a great jumping-off point for a conversation that's been building for a while now. The core problem is one you probably already feel in your bones if you work in this space: as A I clusters scale — we're talking hundreds of thousands of GPUs or accelerators — the interconnect starts to become the constraint. Not just latency, but raw bandwidth, power per bit, and the physical density of getting enough signal off the package and across the rack. Skyler: So what does integrated optics actually mean here? The idea is to move the optical transceiver — the component that converts electrical signals to light and back — much closer to the chip. In the traditional pluggable optics world, you've got a discrete transceiver plugged into a faceplate port, and you've got a copper trace running from your ASIC to that transceiver. That copper trace is short, but it's not free — it burns power, it limits bandwidth density, and at the speeds we're talking about today, like 112 gigabaud and moving to 224, it becomes a real problem. Skyler: Co-packaged optics, or CPO, is the answer the industry is converging on — at least for the high-bandwidth-density applications. You integrate the optical engine directly into the package with the switch ASIC or the NIC. You're dramatically cutting the length of that electrical interface. And the payoff is significant: lower power per bit, higher bandwidth per unit of port area, and better signal integrity. The Photonics Spectra piece frames this as breaking the bandwidth bottleneck, and I think that's accurate — but it's worth being precise about which bottleneck we're talking about. It's not just raw throughput. It's bandwidth density at scale. You can keep adding pluggable ports up to a point, but at some scale you just run out of faceplate. Skyler: The hyperscalers are very much driving this. Google has been publishing CPO work for a few years. Meta's been doing it. Microsoft's in there. And the timelines are actually starting to compress. The article points to 2026 as a meaningful inflection — not full mainstream deployment, but enough production volume that the supply chain is starting to mature. The silicon photonics ecosystem specifically — companies doing integrated modulators and detectors on silicon wafers — has been the enabling technology here. And what's interesting is that the same fab infrastructure that makes leading-edge logic is increasingly being adapted for photonics, which helps costs. Skyler: For the engineers in the audience: the key integration challenges are thermal management — optics and electronics don't love the same temperature profiles — alignment at assembly time, and getting the optical coupling efficient enough to not eat all your power budget. Those are not solved problems universally, but they're getting solved product by product. The bandwidth bottleneck for hyperscale A I is real, and integrated optics is legitimately the path forward. This is a story that's going to keep developing through 2026 and into 2027. Skyler: Next — and this one's interesting because it comes from a semiconductor strategy angle — Semivision published a piece on Samsung going after the next A I battleground beyond HBM, specifically targeting advanced packaging and co-packaged optics. And look, Samsung is in a fascinating position right now. They've been the dominant HBM supplier alongside SK Hynix, but the HBM market is intensely competitive and margins are under pressure. So where do you go next? You go up the stack — into the packaging and the integration layer. Skyler: Samsung's 2.5D and 3D packaging capabilities are already substantial. They've got their own interposer technology, their advanced packaging lines. But the CPO angle is the really interesting addition here. What Samsung is signaling — and this tracks with things I've seen in their public roadmaps — is that they want to be not just a memory vendor but an integration platform. Imagine a package where you've got HBM sitting on an interposer alongside compute logic and an optical engine, all co-packaged together. That's a very different value proposition than shipping a DRAM stack. Skyler: The strategic logic makes sense. Whoever controls the advanced packaging platform for A I accelerators has a lot of leverage. TSMC understood this years ago with CoWoS — Chip on Wafer on Substrate — which has been in high demand to the point of capacity constraints. Samsung is trying to build a credible alternative and extend it into the optical domain. The Semivision piece frames this as Samsung targeting a new battleground, and I think that's the right frame. HBM was one fight. This is the next one. Skyler: For the interconnect angle specifically: if you're building a scale-up fabric — connecting accelerators within a pod or a rack — having the optical interface co-packaged with the accelerator logic fundamentally changes the system architecture. You don't need a separate NIC, you don't need a pluggable module, the optical port is part of the chip package. That changes your PCB design, your mechanical design, your thermal design, everything. And Samsung positioning itself to offer that full stack — memory, packaging, optics integration — is a real competitive play, not just a press release. Skyler: The open question is execution. Samsung's advanced packaging has lagged TSMC's in terms of customer adoption for leading-edge A I chips. And CPO adds another layer of complexity — now you're coupling optical alignment with high-density interconnect packaging. That's hard. But the strategic direction is smart, and if they can execute, they become a genuinely different kind of supplier in this ecosystem. Worth watching closely. Skyler: Alright, story three — Nokia has launched what they're calling an A I Networking Lab for A I-native datacenters. The announcement came through Techgenyz, and on the surface it sounds like a lot of vendor lab announcements. But let me give you some context for why Nokia in this space is worth paying attention to. Skyler: Nokia's networking business — specifically Nokia Bell Labs, which has serious research credibility, and their IP and optical networking division — has been repositioning hard toward datacenter and A I workloads. They're not the first name you think of when you think A I fabric. That's Infiniband, that's Ethernet with RoCE, that's companies like Arista, Cisco, or the hyperscaler custom silicon shops. But Nokia has deep expertise in high-capacity optical transport, and they've been trying to translate that into the datacenter context. Skyler: The A I Networking Lab concept, as reported, is about creating an environment where Nokia can develop and test networking solutions purpose-built for A I training and inference workloads. What does A I-native mean here? Broadly, it means designing the network with the specific traffic patterns of A I in mind — the all-reduce collectives, the bursty east-west traffic between GPU nodes, the latency sensitivity of synchronization steps. A traditional enterprise network or even a conventional cloud network isn't optimized for this. The traffic matrix is different, the congestion patterns are different, the failure modes you care about are different. Skyler: Nokia's angle seems to be that their experience with high-capacity, low-latency optical networking translates. And they're not wrong that there's a connection — as we've been talking about with CPO and integrated photonics, the optical layer is becoming increasingly central to A I fabric design. If Nokia can bring their transport expertise into the in-datacenter context, they have something to contribute. The lab is probably also a way to partner with hyperscalers and co-design solutions — vendor labs like this are often as much about customer engagement and co-development as internal R&D. Skyler: My take: Nokia is a credible player in optical networking, and as the A I fabric world converges on photonics for scale-up and scale-out, there's a lane for them. The skeptical read is that they're a bit late and the inside-datacenter networking space has well-entrenched competitors. The optimistic read is that the boundaries between WAN transport and in-datacenter optical fabric are blurring, and Nokia is well-positioned for that blur. Either way, a dedicated A I networking lab signals real investment and intent, and I'll be watching what actually comes out of it technically. Skyler: Story four — Marvell has been actively pushing their Photonic Fabric technology, and they published a detailed technical page on it this week. This one is directly in Line Rate's wheelhouse, so let's spend a little more time on the substance. Skyler: Marvell's Photonic Fabric is their play for optical scale-up networks for accelerated computing. The core idea is to use silicon photonics — optical transceivers built on silicon wafers — as the interconnect layer between accelerators, enabling very high bandwidth, very low latency connections within a rack or across a pod. Marvell has been developing silicon photonics for years, acquiring Inphi back in 2021 for a hefty sum, which gave them a substantial optical interconnect portfolio and some deep expertise in the space. Skyler: What Marvell is describing with Photonic Fabric is essentially a disaggregated optical interconnect architecture for A I compute clusters. Instead of relying on traditional copper-based backplanes or pluggable optical modules with all their density limitations, you use a photonic layer that can deliver terabits per second of bandwidth in a much smaller form factor with significantly better power efficiency. The key metrics they're pushing on are bandwidth density and power per bit — the same metrics that come up every time we talk about the scale-up interconnect problem. Skyler: The scale-up context is important here. Scale-up networking — connecting GPUs or accelerators within a node or a tightly coupled pod — has traditionally been NVLink's domain for NVIDIA systems, or proprietary interconnects for other vendors. The A I industry has been looking for open alternatives, and that's partly what's behind UALink — the U A Link consortium working on an open scale-up interconnect standard. Marvell's Photonic Fabric sits in an interesting position relative to that: it's a physical layer technology that could potentially underlie or complement a protocol like U A Link, rather than competing with it directly. Skyler: Marvell is also positioning this for what they call optical scale-up — the idea that you can extend the scale-up domain beyond what's practical with copper, reaching across a rack or even between racks while maintaining the low latency and high bandwidth that A I training collectives need. That's a meaningful extension. Copper scale-up is physically limited by signal integrity over distance. Optics removes that constraint and lets you think about much larger compute domains as a single fabric. Skyler: Competitively, Marvell is one of a handful of credible silicon photonics players with the scale and the customer relationships to actually land this in hyperscaler infrastructure. They're competing in some ways with Broadcom, who has their own optical and switch silicon ambitions, and with startups in the photonic interconnect space. The fact that they're publishing detailed technical content on Photonic Fabric suggests they're ready to engage customers seriously. Keep an eye on design win announcements through 2026 — that's how you'll know if the technology is landing. Skyler: And last story for today — Seeking Alpha ran a piece on optical interconnects as the new bottleneck for A I datacenters, and while Seeking Alpha is investor-focused rather than technical, the piece actually surfaces some dynamics that are worth discussing on this show. Skyler: The framing is that the A I infrastructure buildout has been so focused on compute — GPUs, TPUs, custom accelerators — that interconnect has become the binding constraint. And the argument is that optical interconnects specifically are now the critical path. Demand is outrunning supply for high-speed optical components, lead times are extending, and the companies that can deliver at scale are in a very strong position. For the investors in our audience, that's the investment thesis being laid out. For the engineers and architects, the implications are a little different but related — if you're planning a large cluster buildout and you're not thinking carefully about your optical supply chain, you're going to have a bad time. Skyler: The piece highlights a few dynamics that track with what I'm seeing. One is that the transition from 400G to 800G — and the push toward 1.6T — has happened faster than component suppliers anticipated. The lasers, the modulators, the DSPs — the whole signal chain has had to scale up simultaneously, and yield and capacity have not kept pace. Two is that CPO, while it's the long-term answer, creates its own supply chain complexity because you're now integrating optical components directly into the chip package, which means co-packaging at the wafer fab level or at advanced packaging facilities. That's a more constrained supply chain than the plug-in transceiver world. Skyler: The third dynamic is geographic. A significant portion of optical component manufacturing is concentrated in Asia, particularly in China, which creates supply chain risk that hyperscalers are increasingly trying to mitigate through supplier diversification and qualification of alternate sources. This is the kind of stuff that keeps supply chain folks up at night and that doesn't get talked about enough in the technical press. Skyler: From a technical architecture standpoint, the implication is that optical interconnect planning needs to happen at the system design level, not as an afterthought. The choice of optical technology — pluggable versus CPO, coherent versus direct detect, the specific modulation format and reach — affects your power budget, your rack density, your cooling architecture, and yes, your procurement timeline. The bottleneck framing is right: interconnect is a first-class design constraint in modern A I datacenter architecture, not an accessory. Skyler: And the companies that figure out supply chain resilience and manufacturing scale for optical components — whether that's on the transceiver side, the silicon photonics side, or the co-packaged optics side — those are the companies that are going to have enormous leverage in the next phase of A I infrastructure buildout. We're talking about hundreds of billions of dollars of datacenter spending that all requires these components. The bottleneck is real, and the race to solve it is very much on. Skyler: Alright, that's a wrap on today's episode of Line Rate. We covered a lot of ground — integrated optics and the bandwidth bottleneck, Samsung's CPO play beyond HBM, Nokia's A I Networking Lab, Marvell's Photonic Fabric for optical scale-up, and the supply chain crunch that's making optical interconnects the new critical constraint in A I infrastructure. Line Rate, brought to you by Ada — helping organizations integrate A I into their real workflows — and Zen Semiconductor, home of the Loom A I fabric, DC-to-DC scale-across interconnect, and Ada for A I deployment at scale. If you found this useful, please subscribe and share with a colleague who lives in this world — it genuinely helps the show grow. Show notes with links to everything we covered today are in the description. I'll catch you next time on Line Rate.