Co-packaged Optics Testing Gets Easier With FormFactor’s Pharos - Quantum Zeitgeist

Skyler: Hey, welcome to Line Rate — the show about datacenter fabric and A I high-speed interconnect. I'm Skyler Monroe, and if you care about the chips and standards moving data between accelerators, across racks, and between datacenters, you're in the right place. Big thanks to our sponsors Ada, who helps clients actually integrate A I into their workflows in meaningful ways, and Zen Semiconductor, an umbrella company with a portfolio of businesses across the silicon industry. Couldn't do it without them. Alright, today we've got a packed show — co-packaged optics is having a moment, Nvidia is racking up Ethernet wins with some very big names, and the datacenter network is quietly turning into something that looks a lot more like memory than we're used to. Let's get into it. Skyler: First up — co-packaged optics testing. This is one of those topics where the technology is moving faster than the tooling, and that gap matters a lot if you're trying to actually ship product. FormFactor just announced something called Pharos, which is a test and characterization platform specifically designed for co-packaged optics devices. And I want to dig into why this is a bigger deal than it sounds. Skyler: So, quick framing for anyone who needs it. Co-packaged optics — CPO — is the approach where you take the optical engine and put it right there on the same package as the switch ASIC or the network chip, instead of plugging in a separate pluggable transceiver module on the faceplate. The whole point is to dramatically cut insertion loss and power consumption by shortening the electrical path between the silicon and the point where your signal goes optical. At 800 gig and beyond, pluggable modules start running into real headroom problems, and CPO is how the industry is trying to break through that wall. Skyler: But here's the thing — testing CPO is genuinely hard. You're not just probing a chip in isolation anymore. You've got an integrated photonic and electronic system, and you need to characterize it at the package level, which means you need wafer-level and package-level probing setups that can handle both the electrical and optical domains simultaneously. That's a very different problem from traditional semiconductor test. Skyler: What FormFactor is offering with Pharos is a platform that can handle that combined electrical and optical characterization at the package level. It's designed to support the kind of high-density, high-speed probing that CPO devices require — we're talking about systems that need to deal with very tight physical constraints and extremely high signal integrity demands all at once. Skyler: Why does this matter for the industry? Because right now, one of the real bottlenecks to CPO adoption is yield and validation. If you can't efficiently test these devices — if every characterization run is a heroic engineering effort — you can't ramp volume production. Test infrastructure is one of those unsexy enabling layers that the whole ecosystem depends on, and FormFactor stepping up with a dedicated platform is a signal that the supply chain is maturing around CPO. That's meaningful. Skyler: The timing also tracks with where hyperscaler demand is going. 1.6 terabit per second switch ASICs are on the roadmap, and at that bandwidth density, the power budget for the optical interface just does not leave room for traditional pluggables. CPO isn't a maybe at that point, it's basically load-bearing. So the fact that the test ecosystem is catching up is good news for everyone trying to hit those roadmap windows. Skyler: Alright, staying on the CPO theme — there's a market report out flagging growth in the co-packaged optics module market, and the headline driver is exactly what you'd expect: A I data demands. Let me talk about what's actually underneath that and why this market dynamic is interesting to watch. Skyler: The report is pointing to CPO as a significant growth market over the next several years, driven by the bandwidth explosion that A I training and inference workloads are creating at the datacenter fabric layer. And this is one of those cases where the market report framing is actually pretty accurate to the underlying technical reality. Skyler: Here's the fundamental dynamic. A I training clusters — especially at the scale that the hyperscalers and the large model companies are running — require enormous bisection bandwidth inside the fabric. When you're doing distributed training across thousands of GPUs or accelerators, the all-reduce and all-to-all communication patterns mean every node is talking to every other node constantly, and the bandwidth requirements scale with model size and cluster size simultaneously. That's a brutal environment for interconnect. Skyler: The optical layer is ultimately what makes those bandwidth numbers achievable over any meaningful distance. Even within a datacenter, once you get beyond a few meters, you're in optical territory. And the question is what form that optical interface takes. Right now, a huge portion of the installed base uses pluggable modules — QSFP-DD, OSFP, that kind of thing. CPO is the next evolution, and the A I buildout is the forcing function that's accelerating the timeline. Skyler: The market structure here is also worth noting. CPO sits at the intersection of the semiconductor supply chain and the photonics supply chain, and those are historically very different industries with different players, different process technologies, and different business models. Silicon photonics is the technology that bridges them — you're essentially building the optical engine using semiconductor fabrication processes, which makes integration with the ASIC package much more tractable. Skyler: Companies like Intel's photonics division, Coherent, II-VI before they merged, Marvell on the DSP side — these are the players that have been building toward this for years. And then you've got the ASIC vendors themselves, Broadcom and Marvell, who are now integrating CPO into their switch silicon roadmaps. The A I spending wave is basically pulling all of this forward, and the market growth numbers reflect that pull. Skyler: One thing I'd flag is that CPO adoption isn't uniform. There's still a debate in the industry between CPO — where the optics are integrated at the package level with the ASIC — and near-package optics, where you get some of the benefits without the full co-design complexity. For some applications and some deployment models, near-package is going to be the practical answer in the near term. But the trajectory is clearly toward tighter integration, and the A I market is the engine driving that. Skyler: Okay, let's shift gears to Ethernet and to Nvidia specifically, because there's a significant competitive development here. Nvidia has landed deals with both Oracle and Meta for its Spectrum Ethernet networking portfolio. And I want to unpack why this is notable and what it says about the Ethernet versus InfiniBand dynamic in A I fabric. Skyler: So Spectrum is Nvidia's Ethernet switch and networking line — this comes from the Mellanox acquisition, and it's been Nvidia's play in the Ethernet space alongside InfiniBand. The conventional wisdom for a while was that InfiniBand was the go-to for serious A I training clusters because of its RDMA capabilities and latency characteristics, while Ethernet was more for general cloud workloads. That picture has been getting more complicated. Skyler: The Ultra Ethernet Consortium — the U E C — is one part of the story. The industry has been pushing hard to make Ethernet competitive for A I workloads by adding capabilities that close the gap with InfiniBand in terms of transport efficiency, congestion management, and latency. The U E C spec is still evolving — we've talked about it on this show before — but the direction of travel is clear: Ethernet wants to own A I fabric, not just enterprise networking. Skyler: But Nvidia is playing its own game here. With Spectrum Ethernet, they're not waiting for U E C to fully land. They've got their own congestion control, their own telemetry and visibility capabilities, and crucially, tight integration with CUDA and the rest of the Nvidia stack. If you're running Nvidia GPUs — which most serious A I clusters are — there's a real argument for keeping the network layer in the Nvidia ecosystem too. Skyler: The Oracle and Meta wins are significant for different reasons. Oracle Cloud is building out serious A I infrastructure — they've been investing heavily in GPU clusters for cloud customers, and choosing Spectrum Ethernet for that fabric is a statement about where they see the technology going. Meta is a different kind of validation — they're a hyperscaler with serious in-house networking expertise, and they don't make vendor decisions lightly. Meta choosing Spectrum Ethernet over other options — InfiniBand or a white-box Ethernet play — says something about the performance and ecosystem maturity of the Spectrum portfolio. Skyler: Now, the competitive context here is important. Broadcom is the other major player in high-performance Ethernet switching for A I fabric, with their Tomahawk and Jericho lines. And there are a bunch of merchant silicon startups — Innovium before the Cisco acquisition, companies like Astral, and others — who have been trying to carve out space in this market. Nvidia winning at Oracle and Meta is a meaningful market share signal. Skyler: It also raises an interesting question about vertical integration. Nvidia already owns the GPU, the NVLink fabric inside a node, and now it's extending into the Ethernet fabric between nodes. If you're running an Nvidia shop end to end, that's a compelling integration story. But it's also the kind of lock-in that makes hyperscalers and enterprises nervous, which is exactly why you see continued investment in open alternatives. Skyler: This story is worth watching because the A I Ethernet market is enormous and still being carved up. The stakes are high enough that Broadcom, Cisco, Arista, Juniper, and startups are all going hard after it. Nvidia landing Oracle and Meta is a real signal, but it's not over by any stretch. Skyler: Alright, fourth story, and this one is more of a conceptual shift piece that I think is genuinely important for how we think about datacenter architecture going forward. Semiconductor Engineering has a piece out arguing that A I workloads are turning the datacenter network into a combined memory and storage fabric. And I want to explore that framing because I think it's largely right, and the implications are significant. Skyler: The traditional mental model for datacenter networking is pretty straightforward: you've got servers, they compute things, and the network moves data between them. The network is a communication layer. Memory is inside the server — DRAM on the motherboard, HBM on the GPU. Storage is somewhere else — a SAN, an object store, whatever. These are distinct layers with distinct roles. Skyler: What A I workloads are doing is blurring all of those boundaries in a fundamental way. When you're running a large model training job across thousands of accelerators, the model parameters, the gradients, the activations — they don't fit in any one node's memory. They're distributed across the cluster. Which means from the perspective of any individual accelerator, the memory it needs to do its work is out there on the network. The network IS the memory hierarchy, functionally. Skyler: This has architectural implications that ripple through everything. If you're designing a network for traditional compute workloads, you optimize for throughput and latency between endpoints. But if the network is effectively the memory system, you need different properties. You need very low latency — we're talking microseconds, not milliseconds. You need coherence or coherence-like semantics in some cases. You need RDMA so that you can do direct memory access across the fabric without going through the CPU on every operation. Skyler: Storage is going through a similar transformation. Model checkpointing, dataset loading, the gradient accumulation state — all of this needs to live somewhere accessible to the entire cluster, and the line between "storage" and "distributed memory" starts to look pretty blurry when your checkpoint access patterns look like memory access patterns. Skyler: Technologies like CXL — Compute Express Link — are partly a response to this. CXL is designed to extend memory semantics across the interconnect, so you can have memory pooled and disaggregated and still have the host see it more or less like local DRAM. That's specifically trying to address the case where memory needs to be a fabric resource, not a per-node resource. Skyler: Similarly, on the storage side, you're seeing NVMe-over-Fabrics evolve to support the kind of latency and throughput that A I workloads demand, and the convergence of the storage network and the compute fabric is an active area of architecture debate right now. Skyler: For the interconnect and silicon engineers in the audience, this shift means that the requirements you're designing for are getting much more demanding across the board. It's not just bandwidth. It's latency tail distribution, it's RDMA semantics, it's the ability to handle fine-grained memory-like operations at scale. That's a different design point than classic packet switching, and it's why we keep seeing new architectures and new standards proposals that don't look quite like what came before. Skyler: And finally, let's zoom out and look at the big strategic picture on CPO — because Digitimes has a piece asking what Nvidia and Broadcom's CPO bets reveal about the future of A I infrastructure, and I think this is the right question to be asking. Skyler: Both Nvidia and Broadcom have made significant commitments to co-packaged optics as a core part of their respective roadmaps. Nvidia is pursuing CPO for its NVLink and networking infrastructure. Broadcom has been working on CPO integration with its switch ASICs for a while now. And the fact that the two biggest names in A I silicon are both going hard on CPO is a pretty strong signal about where the industry is heading. Skyler: Let me give you the strategic logic. At the bandwidth densities that next-generation A I clusters require — we're talking about moving toward systems where a single switch ASIC is handling multiple terabits per second of aggregate bandwidth — pluggable optics just can't keep up on power efficiency. The power consumed by the optical interfaces becomes a dominant factor in total system power, and the hyperscalers are under enormous pressure to manage power because datacenters are running into power delivery and cooling constraints. Skyler: CPO fundamentally changes the power equation. When the optical engine is co-packaged with the ASIC, the electrical interconnect between the silicon and the optical engine is millimeters long instead of tens of centimeters. That difference in the electrical path translates directly into lower insertion loss, lower required signal power, and ultimately, fewer watts per bit. At the scale hyperscalers operate, that is a very big deal. Skyler: For Nvidia, CPO is about maintaining their performance density advantage as they scale NVLink and their networking portfolio. If you want to push NVLink to the bandwidth levels that future GPU clusters will need, you need the optical interconnect to keep pace, and CPO is how you do that while staying within the power envelope. Skyler: For Broadcom, CPO is about protecting their position in switch ASICs. Broadcom has owned the high-end switching market for a long time with Tomahawk and Jericho. As the A I fabric market grows and as the requirements push past what pluggable modules can deliver, having a credible CPO story is table stakes for staying relevant to hyperscaler customers. Skyler: There's also a supply chain dimension here that's worth flagging. CPO requires very tight co-design between the ASIC team and the photonics team. That's different from the pluggable world, where the two could be developed pretty independently. So the companies that get CPO right are the ones that have either built or acquired the photonics expertise to do that co-design. That's one reason you've seen acquisitions and partnerships accelerate in this space — it's hard to bolt on the photonics capability after the fact. Skyler: What does this reveal about the future of A I infrastructure more broadly? I think it tells us that the optical layer is becoming a first-class design concern at the system level, not an afterthought or a commodity. The decisions about how you do your optical interconnect are going to shape the performance, the power envelope, and the scalability of A I clusters for the next decade. The companies that get this right early are going to have durable advantages. And the companies that are late to CPO — whether they're chip vendors, system vendors, or cloud providers — are going to be playing catch-up in a market that does not wait around. Skyler: Alright, that's a wrap on today's show. We covered a lot of ground — CPO testing infrastructure maturing with FormFactor's Pharos, the A I-driven market growth in co-packaged optics, Nvidia taking Spectrum Ethernet wins at Oracle and Meta, the datacenter network evolving into a memory and storage fabric, and what Nvidia and Broadcom's CPO bets tell us about where A I infrastructure is heading. A lot of threads there that connect, and I expect we'll be coming back to all of them. Line Rate, brought to you by Ada and Zen Semiconductor — Ada helps teams integrate A I into their workflows in ways that actually stick. If you found this useful, subscribe wherever you get your podcasts, share it with someone who cares about this stuff, and check the show notes for links to everything we covered today. See you next time.