Google Bolsters AI Hypercomputer with New TPU Chips, Virgo Interconnect, Speedier Lustre - HPCwire

Skyler: Hey, welcome to Line Rate — the show tracking everything happening in datacenter fabric and A I high-speed interconnect. I'm Skyler Monroe, and if it moves bits between accelerators, racks, or datacenters, we're talking about it here. Big thanks to our sponsors Ada, who helps organizations actually integrate A I into their real workflows, and Zen Semiconductor, an umbrella company with a portfolio of businesses across the silicon industry. Today we've got a packed show — Google is pulling back the curtain on Virgo, their new in-house interconnect, optical component makers are having a moment as A I capex keeps climbing, Cisco is making its case for the A I datacenter, co-packaged optics is creeping into rack-scale infrastructure, and optical circuit switching is stealing the show at OFC 2026. Let's get into it. Skyler: Alright, first up — Google. HPCwire ran a piece on Google bolstering what they're calling their A I Hypercomputer, and the headline items are new TPU chips, something called Virgo interconnect, and a faster version of Lustre for the storage layer. Let's unpack each of these because they're actually pretty distinct stories bundled into one announcement. Skyler: So the TPU side — Google has been iterating on Tensor Processing Units for years, and each generation has pushed the memory bandwidth and compute density envelope. The new chips are designed to feed the appetite of increasingly large model training runs, which now routinely span thousands of accelerators. That's not the surprising part — it's table stakes at this point for a hyperscaler. Skyler: The interesting piece is Virgo. This is Google's custom interconnect fabric, and from what's been reported, it's designed to connect TPUs at scale — we're talking the kind of tightly coupled, low-latency, high-bandwidth fabric you need when you're doing synchronous all-reduce operations across a massive training cluster. This is squarely in the same design space as NVLink from NVIDIA and what the broader industry is trying to standardize with U A Link and U E C. Skyler: The thing about proprietary interconnects like Virgo is they let you co-design the fabric with the chip. You can tune the topology, the flow control, the congestion management — everything — to exactly the workload you're running. Google has the scale to justify that investment, and it gives them a meaningful performance advantage over anyone running off-the-shelf Ethernet or even InfiniBand for their specific workloads. Skyler: But it also means fragmentation. Every hyperscaler doing their own thing — Google with Virgo, Meta with their own fabric work, Microsoft with Azure's custom silicon plays — it makes life harder for the industry to coalesce around common standards. That's the tension that U E C and U A Link are trying to resolve, and it's real. Skyler: The Lustre piece is worth mentioning quickly. Lustre is a parallel filesystem that's been a workhorse in HPC environments for decades. Google tuning it for A I workloads is a signal that storage I/O is now a serious bottleneck in large training runs — checkpointing multi-hundred-billion parameter models isn't trivial, and if your storage layer can't keep up, you're leaving GPU and TPU cycles on the floor. Skyler: The bigger picture here is that Google is vertically integrating deeper and deeper into the A I infrastructure stack — custom silicon, custom interconnect, custom storage. When you can do all three, you get to optimize across layers in ways that are just not possible when you're assembling from commodity parts. That's a real competitive moat, and it's one reason the rest of the industry is watching Google's infrastructure announcements so closely. Skyler: Okay, next story. The Globe and Mail ran a piece framing up three optical component companies in the context of massive A I datacenter growth. I want to talk about this one a bit differently — not just as financial analysis, but as a signal of where the infrastructure buildout actually is right now. Skyler: The optical component market is on fire, and it's not hype. When you scale up A I clusters to tens of thousands of GPUs or TPUs, the electrical interconnect that works fine at smaller scales starts hitting its limits. You hit signal integrity walls, power walls, distance walls. Optics solves all three. Skyler: The component giants in this space — we're talking companies like Coherent, II-VI which merged into Coherent, Lumentum, and Fabrinet on the manufacturing side — these are the folks supplying the transceivers, the lasers, the modulators, the photodetectors that make high-speed optical links work. When hyperscalers go on capex spending sprees, these companies feel it in their order books. Skyler: What's particularly interesting right now is the transition happening between generations. For years, the dominant form factor was pluggable transceivers — QSFP-DD, OSFP, those kinds of modules you slot into a switch or NIC faceplate. They're mature, they're hot-swappable, they work great. But as you push to 800 gigabit and beyond, the power budgets and density constraints of pluggable modules start to bind. Skyler: That's pushing the industry toward co-packaged optics and even on-board optics, where you integrate the optical engine much closer to — or directly with — the switch ASIC or the NIC. The optical component companies have to evolve their product lines to serve both worlds simultaneously, which is actually a tricky business execution challenge on top of the technical challenge. Skyler: From an investment standpoint, the thesis is pretty straightforward — A I capex is going up, the optical content per dollar of compute is going up as you push to higher speeds, and there's a multi-year upgrade cycle ahead of us as datacenters retrofit for 800 gig and 1.6 terabit. That's a long runway for companies that can execute on yield and volume. Skyler: The risk, of course, is concentration. A huge chunk of optical component demand right now is driven by a small number of hyperscalers. If Google, Microsoft, or Amazon shifts its sourcing strategy, or if a technology transition happens faster or slower than expected, that flows directly through to the component vendors. It's a high-stakes supply chain. Skyler: Story three — Cisco dropped a blog post titled Building Data Center Infrastructure for the A I Revolution. Now, Cisco is not historically the first name you think of when someone says A I fabric, but they're making a very deliberate play here and it's worth understanding what they're actually arguing. Skyler: Cisco's core message is that while everyone is focused on the front-end A I fabric — the GPU-to-GPU interconnect — the back-end network, the storage network, the management plane, the overall datacenter architecture still matters enormously. And they're not wrong. The glamorous part of A I infrastructure is the NVLink domain or the InfiniBand fabric connecting GPUs in a pod. But those pods don't exist in isolation. Skyler: You still need to move training data in, move checkpoints out, handle inference traffic, manage east-west flows between different clusters, and connect your A I infrastructure to the rest of your enterprise or cloud environment. That's a lot of Ethernet switching, a lot of routing, a lot of network management — and that's where Cisco plays. Skyler: Cisco has been pushing their Silicon One architecture pretty aggressively, and they've positioned it as capable of serving both the traditional routing and switching market and the A I fabric market. The claim is a single ASIC family that can handle everything from service provider routing to A I backend fabric. That's an ambitious design target, and the market is still evaluating whether the tradeoffs make sense. Skyler: What's notable is Cisco is also leaning into Ethernet for A I fabric — they're active participants in the Ultra Ethernet Consortium, pushing U E C forward. Their argument is that open, standards-based Ethernet with the right transport layer enhancements is a better long-term bet than proprietary fabrics, especially for enterprises and hyperscalers who don't want to be locked into a single vendor's ecosystem. Skyler: The competitive dynamic here is real. NVIDIA's DGX SuperPOD with NVLink and InfiniBand is a complete, vertically integrated solution that's hard to beat on raw GPU-to-GPU bandwidth for training. Cisco's pitch is essentially — yes, but look at everything else around that pod, and look at the total cost of ownership, and look at the operational complexity of running multiple parallel networks. There's a genuine debate happening in the industry about how much of the A I workload actually needs the absolute lowest latency interconnect versus what can run on well-engineered Ethernet. Skyler: The blog post format is obviously marketing, but it's substantive marketing — Cisco is making specific architectural arguments, not just waving a flag. Worth reading if you're thinking through datacenter architecture for mixed A I and traditional workloads. Skyler: Story four — Electronics360 published a piece specifically on co-packaged optics for rack-scale A I infrastructure. This is getting into the technical weeds in a way I really enjoy, so let's dig in. Skyler: Co-packaged optics, or CPO, is the idea of integrating optical engines directly onto the same package as a switch ASIC or accelerator, rather than having external pluggable transceivers connected by a PCB trace. The motivation is straightforward — as you go to higher data rates, those PCB traces become a real problem. The electrical signal degrades, you need more power to drive it, and you're fighting signal integrity issues that get worse with every generation. Skyler: By moving the optical engine onto the package, you dramatically shorten the electrical path. You go from centimeters of PCB trace down to millimeters of on-package interconnect. That means lower power, better signal integrity, and the ability to scale to higher lane rates — 100 gig per lane, 200 gig per lane — without the heroic equalization that pluggable modules require. Skyler: The challenge has always been manufacturability and repairability. A pluggable transceiver is hot-swappable — if it fails, you swap it out in seconds. A co-packaged optical engine is much more intimately coupled to the ASIC. If something goes wrong with the optical side, you potentially have a more complex repair or replacement situation. The industry has been working through this with designs that allow the optical engine to be field-replaceable even in a co-packaged configuration. Skyler: For rack-scale A I infrastructure specifically, CPO is compelling because you're building fixed configurations — a 128-GPU pod with a specific topology isn't going to be reconfigured every week. The repairability concern matters less when you've designed for specific scale-out architectures. And the power savings are significant at scale — we're talking potentially hundreds of watts per switch that you're not spending on pluggable transceiver power, which adds up fast across a large cluster. Skyler: The article focuses on where the ecosystem is right now, and the honest answer is CPO is transitioning from early deployments to broader productization. Intel, Broadcom, Marvell, and several startups are all shipping or sampling CPO solutions. The hyperscalers are evaluating them seriously. The next twelve to eighteen months are probably when we'll see whether CPO crosses the adoption chasm for A I fabric specifically. Skyler: One thing worth flagging — there's a spectrum here. Full co-packaged optics where the laser is on the ASIC package is one end. On-board optics, where the optical engine is on the PCB but very close to the ASIC, is a middle ground. Near-package optics is another term you'll see. The terminology is still evolving, and different vendors are drawing the lines in different places, which makes comparisons tricky. Pay attention to exactly what's being integrated where when you're evaluating these claims. Skyler: Last story, and honestly one of the most forward-looking things on my radar right now — a SemiVision writeup on optical circuit switching, OCS, reshaping A I datacenter architecture, specifically framing it around OFC 2026. OCS is genuinely interesting and I think it's underappreciated outside of the optics and systems architecture community. Skyler: So let's start with the basics. Traditional datacenter switching is packet switching — you break data into packets, each packet gets routed through the network hop by hop based on headers, and you get statistical multiplexing across shared links. It's flexible, it handles bursty traffic well, and it's what essentially every datacenter in the world runs on. The downside is every hop adds latency, and at very high bandwidths, the power consumed by the electronics doing packet processing is substantial. Skyler: Optical circuit switching takes a different approach. Instead of switching packets, you switch the optical paths themselves — you configure a physical light path between two endpoints, and data flows through at the speed of light with essentially zero switching overhead. The tradeoff is you have to set up and tear down circuits, which takes time — on the order of milliseconds for current OCS technology — so it works best for flows that are large and somewhat predictable in duration. Skyler: A I training workloads are actually a surprisingly good fit for OCS. When you're running an all-reduce across thousands of accelerators, the communication pattern is highly structured and predictable. You know which nodes need to talk to which other nodes, and you know roughly how much data is moving. That's amenable to circuit-switched thinking in a way that general-purpose web traffic absolutely is not. Skyler: Google has actually deployed OCS in their Jupiter datacenter network already, using it as part of a hybrid packet-plus-circuit architecture. The idea is you use packet switching for unpredictable, bursty traffic and you use optical circuits for the fat, predictable flows that A I training generates. You get the flexibility of packet switching where you need it and the efficiency of circuit switching where the traffic profile allows it. Skyler: OFC 2026 apparently had significant coverage of OCS — multiple papers, multiple vendor demonstrations. That's a signal that the technology is moving from research curiosity toward serious deployment consideration. The systems architecture questions are fascinating — how do you orchestrate circuit setup across a large fabric? How do you handle failures? How do you integrate OCS with the packet-switched underlay? These are unsolved problems at scale. Skyler: The competitive implications are interesting too. If OCS becomes a standard tool in the A I datacenter architect's toolkit, it reshapes who the relevant vendors are. Traditional packet switch vendors — your Broadcoms, your Marvells, your Ciscos — have less of an advantage in a world where significant traffic bypasses their switch ASICs entirely. The winning companies in an OCS world are the ones building the MEMS or silicon photonics OCS fabrics themselves, and that's a somewhat different set of players. Skyler: The honest assessment is OCS is real but it's early for broad deployment. Google's use of it is impressive but Google is also uniquely positioned to build and operate bespoke infrastructure. For everyone else, the operational tooling, the reliability track record, and the integration story need more time to mature. But OFC 2026 coverage suggests the industry is taking it seriously, and I'd expect to see more concrete deployment announcements over the next couple of years. Skyler: Okay, that's a wrap on today's show. Five stories, a lot of ground covered — from Google's Virgo interconnect to co-packaged optics to optical circuit switching reshaping how we think about datacenter topology. The through line is that A I is driving the entire interconnect stack to reinvent itself simultaneously, and we're living through that reinvention in real time. Skyler: Line Rate, brought to you by Ada and Zen Semiconductor. Ada helps organizations integrate A I into their workflows — worth a look if you're trying to make that actually work in practice, not just in theory. Zen Semiconductor is an umbrella company with a portfolio of businesses across the silicon industry. Skyler: If you found today's episode useful, subscribe wherever you get your podcasts and share it with someone who cares about where datacenter infrastructure is heading. Show notes with links to all five stories are available — find them in your podcast app or wherever you found this episode. I'm Skyler Monroe, see you next time on Line Rate.