Marvell Expands SiGe Capacity With GlobalFoundries for AI Data Center Optics - konsulteer.com

Skyler: Hey, welcome back to Line Rate — the show that tracks what's actually happening in datacenter fabric and A I high-speed interconnect. I'm Skyler Monroe, and if you care about the chips, the standards, and the physical layer moving data between accelerators, racks, and datacenters, you're in the right place. Huge thanks to our sponsors today — Ada, who helps clients integrate A I into their real-world workflows, and Zen Semiconductor, an umbrella company with a portfolio across the silicon industry. Really appreciate their support. Alright, we've got a packed episode today — Marvell is locking in more SiGe capacity with GlobalFoundries, the optical interconnect market is on a absolutely wild growth trajectory, Nokia is making moves with Ultra Ethernet, and we're going to dig into what all of this means for where A I fabric is actually headed. Let's get into it. Skyler: Okay, story one. Marvell has announced an expansion of its silicon germanium — SiGe — manufacturing capacity through a deeper partnership with GlobalFoundries. And this is specifically for A I datacenter optics. So let's unpack why this matters. SiGe, silicon germanium, is a compound semiconductor process — it's not your standard CMOS. The reason it's interesting for optics is that SiGe transistors can operate at extremely high frequencies, we're talking well into the millimeter-wave range, which makes it really well suited for the driver and transimpedance amplifier circuits that sit right next to optical components in high-speed links. When you're doing 100 gig or 200 gig per lane signaling, the analog front-end electronics are absolutely critical — and SiGe gives you performance headroom that standard silicon CMOS struggles to match at those speeds. Now, Marvell has been building out a serious co-packaged optics story. They've got their Brightlane platform, they're deeply engaged with hyperscalers on next-generation switch and connectivity solutions, and securing dedicated SiGe capacity at GlobalFoundries is a supply chain play as much as it is a technology play. Because here's the thing — when the market for A I datacenter optics goes from being a niche high-performance segment to a mainstream volume business, you need guaranteed wafer starts. You can't just call up your fab partner at the last minute and ask for a few extra thousand wafers. GlobalFoundries has SiGe expertise going back to their IBM heritage — they've been doing BiCMOS and SiGe processes for a long time. So Marvell locking in capacity there is a pretty smart hedge. The competitive context here is real. Marvell is going up against Broadcom, they're going up against in-house silicon from the hyperscalers themselves, and the optical component players like II-VI and Coherent are also moving up the stack. So having a differentiated, secured manufacturing process for your analog photonics front-end is a genuine competitive moat, not just a press release. Watch this space — SiGe capacity is going to become a real bottleneck as co-packaged optics scales. Skyler: Story two takes us to a Photonics Spectra feature from March 2026 on integrated optics and breaking the bandwidth bottleneck for hyperscale A I. This is a good piece to ground ourselves in the technical landscape right now. So let's talk about what the bottleneck actually is. Modern A I clusters — we're talking systems with hundreds of thousands of GPUs or accelerators — are fundamentally constrained by how fast you can move data between chips. The compute is there. The memory bandwidth within a node is improving. But the interconnect — the thing that lets all those chips act like one giant brain — that's where the physics gets hard. Electrical signaling over copper traces has a distance problem. As you push data rates higher, the signal degrades faster, you need more retimers, more power, more board real estate. The integrated optics answer to this is essentially: get the light source as close to the chip as possible, ideally in the same package, and use photons instead of electrons to carry data across longer distances with much lower loss and much lower power per bit. Integrated optics is the broader term that covers a few different approaches — you've got silicon photonics, which uses standard CMOS-compatible processes to build waveguides, modulators, and photodetectors on silicon, and then you've got things like indium phosphide or lithium niobate for higher-performance components. The hyperscale angle here is critical. When you're Google or Microsoft or Meta and you're building a cluster with a million-plus accelerators, even a small improvement in interconnect power efficiency or latency propagates into enormous savings at scale. The Photonics Spectra piece rightly calls out that we're at an inflection point — the question is no longer whether integrated optics is technically viable, it clearly is. The question is about yield, cost at volume, and standardization. Those are the hard parts. Getting photonic integrated circuits to yield like a CMOS chip is still a significant manufacturing challenge. And then there's the ecosystem question — you need the entire supply chain, from laser sources to packaging to test equipment, to mature simultaneously. But the trajectory is clear. Integrated optics is not a research curiosity anymore. It's a near-term production reality for the most demanding A I interconnect applications. Skyler: Story three is from Cisco's blog, and the title is "Beyond the Data Center: High-Performance Networks for A I." Now, I'll be upfront — this is vendor content, a blog post from Cisco, so we read it with that lens. But there's genuine technical substance worth discussing here. The "beyond the datacenter" framing is interesting because most of the A I fabric conversation is hyper-focused on what happens inside the four walls of a single facility — your RoCE fabric, your NVLink domains, your InfiniBand clusters. But Cisco is pointing at something real, which is that the largest A I training and inference workloads are increasingly distributed across multiple datacenters, sometimes across metro distances, sometimes across WAN. And that changes the networking problem significantly. Inside a datacenter, you can get away with relatively simple congestion control because your latency is measured in microseconds and your topology is known. The moment you're stretching a workload across two datacenters in different cities, now you're dealing with milliseconds of latency, asymmetric paths, and the fundamental challenge that most A I frameworks were not designed for that kind of network variability. Cisco's angle here is their routed networking portfolio — they're coming at this from the WAN and campus side, not from the pure-play A I fabric side. But the point they're making about the need for high-performance networks that span beyond a single DC boundary is genuinely important. We're going to see more and more of these multi-site A I training jobs, partly because no single facility can house the kind of compute that frontier model training is starting to require, and partly because power constraints are forcing geographic distribution. The technical challenge there is real — you need very low jitter, high bandwidth, and ideally some form of transport that plays nice with the flow control mechanisms your A I framework is using. Cisco has the reach and the enterprise relationships to be relevant here. Whether they can compete on the pure performance metrics that A I fabric demands is a different question. But the "beyond the datacenter" framing is one more people should be thinking about. Skyler: Story four — and this one I'm genuinely excited about — Nokia has announced a successful end-to-end Ultra Ethernet test across their datacenter switch family. Let's dig in. Ultra Ethernet — U E C, the Ultra Ethernet Consortium — is the industry effort to take Ethernet and make it actually good for A I workloads. If you've been following this show, you know the backstory: InfiniBand has been the dominant fabric for tightly coupled A I training because it handles congestion and flow control in ways that standard Ethernet just doesn't. RDMA over Converged Ethernet, RoCE, was a workaround — you can make Ethernet work for A I, but you have to very carefully manage your network to avoid the kinds of packet drops and congestion that absolutely destroy performance on collective operations like all-reduce. What U E C is trying to do is essentially standardize the fixes. Things like better end-to-end congestion control, shot-based transport to reduce head-of-line blocking, and a richer set of telemetry so your fabric can react to congestion faster. The spec is still evolving — let me be really clear about that. U E C 1.0 has been published, but the ecosystem is still catching up. We don't yet have a ton of shipping silicon that fully implements U E C 1.0, and interoperability between different vendors is still being worked out. So Nokia doing an end-to-end test across their own switch family is a meaningful step, but it's a single-vendor demonstration. The real test — and the real value of U E C — comes when you can take a Nokia switch, an Arista switch, a Broadcom-based merchant silicon switch, put them in the same fabric, and have them all behave correctly together. That's what the consortium is working toward. Nokia doing this test matters because it shows they're serious about U E C, they're investing in the software stack and the ASIC features needed to make it work, and they want to be positioned as a credible A I datacenter networking vendor. They're not typically thought of as a hyperscale A I fabric player — that's Arista's and Broadcom's turf — so this is Nokia planting a flag. Watch for interoperability plugfests from the U E C consortium later this year — those will tell us a lot more about where the ecosystem actually stands. Skyler: And story five is the one that puts everything else we've talked about today in market context. According to new projections covered by Tom's Hardware, the A I datacenter optical interconnect market is expected to hit 144 billion dollars by 2030. That is a more than ten-fold increase from 2024 figures. Let me just sit with that for a second — ten times in six years. And the projection says silicon photonics is expected to account for nearly two-thirds of that revenue, largely driven by co-packaged optics. So let's break down what this is actually saying and why the numbers make sense even if you're skeptical of analyst projections. The 2024 baseline for optical interconnect in datacenters was in the low tens of billions. It was already a sizable market. The growth driver here is not just more datacenters — it's the transition from electrical to optical at shorter and shorter reach. Historically, optical interconnects were for long-haul, then metro, then eventually campus distances. But A I is pulling optics into the rack, into the switch itself, and eventually into the package. Every time optics moves closer to the chip, it opens up a new segment of the market that was previously served by copper. Co-packaged optics is the most dramatic version of this — you're literally putting the optical engine in the same package as the switch ASIC. That eliminates the pluggable module, it reduces power, it increases bandwidth density, and it creates a completely new supply chain dynamic. The silicon photonics angle is important too. Traditional optical components are made from III-V semiconductors — indium phosphide, gallium arsenide — which are expensive and hard to scale. Silicon photonics uses standard CMOS fabs, which in theory gives you much better cost scaling at volume. In practice there are still challenges around things like laser integration, because silicon is not a good light emitter, so you still need to bond or butt-couple III-V lasers onto your silicon photonics chip. But the economics are improving rapidly. For context on the competitive landscape: Marvell, Intel's photonics group, Broadcom, and a bunch of startups like Ayar Labs and Lightmatter are all competing for pieces of this 144 billion dollar pie. The hyperscalers are also investing directly — Google and Microsoft have both made moves here. If these projections are even half right, optical interconnect is going to be one of the defining infrastructure bets of the rest of this decade. Skyler: Alright, that's a wrap on today's episode of Line Rate. We covered a lot of ground — SiGe capacity, integrated optics, multi-site A I networking, Ultra Ethernet getting real, and a market trajectory that should make everyone in this space pay attention. Thanks again to our sponsors, Ada — helping clients integrate A I into their workflows — and Zen Semiconductor, an umbrella company with a portfolio of companies across the silicon industry. Couldn't do this without them. If you found this useful, please subscribe wherever you get your podcasts, share it with someone on your team who should be tracking this stuff, and check the show notes for links to all the stories we covered today. I'll see you next time on Line Rate — brought to you by Ada and Zen Semiconductor.